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Chipmind launches RTL Canvas for AI chip design review

Chipmind launches RTL Canvas for AI chip design review

Tue, 14th Jul 2026 (Today)
Sofiah Nichole Salivio
SOFIAH NICHOLE SALIVIO News Editor

Chipmind has launched RTL Canvas, a new interface for chip design engineers and AI agents that creates a shared visual layer for reviewing and changing register transfer level designs.

The Zurich-based semiconductor design software company says the tool lets engineers sketch changes directly on an RTL diagram, while AI-generated edits are returned as a visual view of the parts of the design they affect.

The launch addresses a growing problem in semiconductor development: AI systems can produce hardware design code faster than engineering teams can review it. While AI can generate and test RTL quickly, companies still rely on human engineers to assess architectural choices, assumptions and edge cases that formal specifications may not capture.

As a result, many teams still review complex design changes through text-heavy pull requests or static diagrams. Chipmind argues that the bottleneck in chip development has shifted from code generation to the process of checking, understanding and trusting what AI systems produce.

With RTL Canvas, engineers can draw intended architectural changes on a live diagram before any code is altered. The software then stages those ideas in a sandbox, where users can test changes to modules, buses, hierarchies and clock domains without affecting the underlying code repository.

Once a change is approved, it can be synchronised with the hardware description language code. The interface also turns code changes into visual diffs, showing additions, removals and unchanged areas in different colours to reduce the need for line-by-line code review.

Review bottleneck

The product is designed to sit beside a standard AI chat panel, but shifts the main interaction from text prompts to graphical manipulation. Depending on the task, the canvas can display different views of a design, including architecture layouts, finite-state machine diagrams and waveform representations.

For engineers working on large or unfamiliar chip projects, the interface supports zooming through design hierarchies, allowing users to move from a broad system view to more detailed functional layouts and address maps. This is intended to help teams inspect large and complex hardware projects more quickly.

Chipmind also deploys the platform inside a customer's own design environment. According to the company, the visual-intent data created through use of the system remains owned by the customer and reflects that team's engineering methods.

Chipmind has positioned the product as a response to the growing use of AI agents in semiconductor design, where faster code generation can create a new bottleneck in human oversight. The company works with large semiconductor groups, though it did not identify customers in the announcement.

Harald Kröll outlined the thinking behind the launch.

"Engineers don't think in code. They think in blocks and buses. So we built a canvas that shows your existing chip design architecture, and you draw your intended changes right onto it while the AI writes the RTL. And it works both ways: when the AI writes, its changes come back as a visual diff, not a wall of text," said Harald Kröll, Chief Executive Officer and Co-Founder of Chipmind.

Visual interface

The wider semiconductor sector has been adopting AI tools across design automation, verification and documentation, but the practical challenge of integrating machine-generated output into existing engineering workflows remains unresolved. In hardware development, the issue is particularly acute because even minor design errors can have significant downstream consequences for performance, manufacturability or validation time.

By focusing on the review stage rather than only on generation, Chipmind is entering a segment of the electronic design automation market that is becoming more important as AI use expands. The system is meant to ensure that design changes are accepted only when a human engineer understands what has changed and what remains unverified.

Sandro Belfanti said the technical objective was to make the interface adapt to each engineering task while keeping the system tied to the underlying design.

"The core technical breakthrough here is that we've given our AI agents the power to shape the user experience dynamically, while maintaining adherence to the underlying hardware reality," added Dr. Sandro Belfanti, Chief Technology Officer and Co-Founder of Chipmind. "This achieves practical determinism: ensuring the AI never hallucinates faulty logic, yet remains flexible enough to sketch unwritten architectures. Ultimately, the agent can safely generate the UI on the fly, creating a bidirectional workspace that adapts instantly to the engineering context. It recreates the intuitive synergy of two engineers standing at a whiteboard, sketching complex architectures in real time. We are moving chip design past the era of parsing raw text and into a fluid, intuitive environment built for how human minds actually conceptualize silicon."